| Titre : |
Design of Low Complex Non Binary LDPC Decoder using Min - Max algorithm |
| Type de document : |
texte imprimé |
| Auteurs : |
Kamel-eddine Harabi, Auteur ; M. Taghi, Directeur de thèse |
| Editeur : |
[S.l.] : [s.n.] |
| Année de publication : |
2017 |
| Importance : |
29 f. |
| Présentation : |
ill. |
| Format : |
30 cm. |
| Accompagnement : |
1 CD-ROM. |
| Note générale : |
Mémoire de Master : Electronique : Alger, Ecole Nationale Polytechnique : 2017
Bibliogr. f. 28 - 29 |
| Langues : |
Anglais (eng) |
| Mots-clés : |
LDPC
Galois Field
NB-LDPC Min-Max Decoder Architecture Design Implementation |
| Index. décimale : |
Ms14417 |
| Résumé : |
Low-density parity-check (LDPC) codes constructed over the Galois field GF(q), which are also called Non-Binary LDPC (NB-LDPC) codes, are an extension of binary LDPC codes with significantly better performance.
The design and implementation of NB-LDPC decoders has rarely been discussed due to their hardware implementation complexity.
In this project, we focused on the design of low complex architecture for a NB-LDPC decoder using the Min-Max decoding algorithm..
The main contributions of this work correspond to the design of the decoder basic bloc ks, as the check node (CN) block, the variable node (VN) block and the codeword decision block with efficiency techniques.
The design of the decoder and its components are detailed, Various details like block schematics and the components functionality and explanation examples have been presented and documented. |
Design of Low Complex Non Binary LDPC Decoder using Min - Max algorithm [texte imprimé] / Kamel-eddine Harabi, Auteur ; M. Taghi, Directeur de thèse . - [S.l.] : [s.n.], 2017 . - 29 f. : ill. ; 30 cm. + 1 CD-ROM. Mémoire de Master : Electronique : Alger, Ecole Nationale Polytechnique : 2017
Bibliogr. f. 28 - 29 Langues : Anglais ( eng)
| Mots-clés : |
LDPC
Galois Field
NB-LDPC Min-Max Decoder Architecture Design Implementation |
| Index. décimale : |
Ms14417 |
| Résumé : |
Low-density parity-check (LDPC) codes constructed over the Galois field GF(q), which are also called Non-Binary LDPC (NB-LDPC) codes, are an extension of binary LDPC codes with significantly better performance.
The design and implementation of NB-LDPC decoders has rarely been discussed due to their hardware implementation complexity.
In this project, we focused on the design of low complex architecture for a NB-LDPC decoder using the Min-Max decoding algorithm..
The main contributions of this work correspond to the design of the decoder basic bloc ks, as the check node (CN) block, the variable node (VN) block and the codeword decision block with efficiency techniques.
The design of the decoder and its components are detailed, Various details like block schematics and the components functionality and explanation examples have been presented and documented. |
|
Ms10015 
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