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Algorithm analysis and architecture design for rate distortion optimized mode decision in high definition AVS video encoder / Hai bing Yin in Signal processing. Image communication, Vol. 25 N° 9 (Octobre 2010) 

Public ISBD [article]  in Signal processing. Image communication > Vol. 25 N° 9 (Octobre 2010) . - pp. 633–647 Titre : Algorithm analysis and architecture design for rate distortion optimized mode decision in high definition AVS video encoder Type de document : texte imprimé Auteurs : Hai bing Yin, Auteur ; Honggang Qi, Auteur ; Hui Zhu Jia, Auteur Année de publication : 2012 Article en page(s) : pp. 633–647 Note générale : Electronique Langues : Anglais (eng) Mots-clés : AVS  Mode  decision  Rate  distortion  optimization  VLSI  architecture Résumé : There are abundant intra and inter prediction modes in the AVS video coding standard. Rate distortion optimized mode decision can fully utilize this flexibility to improve the spatio-temporal prediction efficiency and maximize the coding efficiency. However, the implementation complexity is dramatically high due to huge throughput burden. Hardware oriented mode decision algorithm is tailored for VLSI implementation in this work for high definition video coding. Mode preselection is employed to alleviate the dramatic throughout burden. Also, intelligent pipeline scheduling mechanism is proposed to break the intrinsic data dependency in intra prediction, which is directly related with mode decision. The proposed simplified algorithm is well-suited for hardware implementation with small performance penalty. Finally, the VLSI architecture is proposed with good trade off between circuit consumption and rate distortion performance. ISSN : 0923-5965 En ligne : http://www.sciencedirect.com/science/article/pii/S0923596510000986 [article] Algorithm analysis and architecture design for rate distortion optimized mode decision in high definition AVS video encoder [texte imprimé] / Hai bing Yin, Auteur ; Honggang Qi, Auteur ; Hui Zhu Jia, Auteur . - 2012 . - pp. 633–647. Electronique Langues : Anglais (eng) in Signal processing. Image communication > Vol. 25 N° 9 (Octobre 2010) . - pp. 633–647 Mots-clés : AVS  Mode  decision  Rate  distortion  optimization  VLSI  architecture Résumé : There are abundant intra and inter prediction modes in the AVS video coding standard. Rate distortion optimized mode decision can fully utilize this flexibility to improve the spatio-temporal prediction efficiency and maximize the coding efficiency. However, the implementation complexity is dramatically high due to huge throughput burden. Hardware oriented mode decision algorithm is tailored for VLSI implementation in this work for high definition video coding. Mode preselection is employed to alleviate the dramatic throughout burden. Also, intelligent pipeline scheduling mechanism is proposed to break the intrinsic data dependency in intra prediction, which is directly related with mode decision. The proposed simplified algorithm is well-suited for hardware implementation with small performance penalty. Finally, the VLSI architecture is proposed with good trade off between circuit consumption and rate distortion performance. ISSN : 0923-5965 En ligne : http://www.sciencedirect.com/science/article/pii/S0923596510000986

Reconfigurable video coding framework and decoder reconfiguration instantiation of AVS / Dandan Ding in Signal processing. Image communication, Vol. 24 N° 4 (Avril 2009) 

Public ISBD [article]  in Signal processing. Image communication > Vol. 24 N° 4 (Avril 2009) . - pp. 287-299 Titre : Reconfigurable video coding framework and decoder reconfiguration instantiation of AVS Type de document : texte imprimé Auteurs : Dandan Ding, Auteur ; Honggang Qi, Auteur ; Lu Yu, Auteur Article en page(s) : pp. 287-299 Note générale : Electronique Langues : Anglais (eng) Mots-clés : RVC  Decoder  configuration  AVS  VTL  BSDL Index. décimale : 621.382 Dispositifs électroniques utilisant les effets des corps solides. Dispositifs semi-conducteurs Résumé : In 2004, a new standardization activity called reconfigurable video coding (RVC) was started by MPEG with the purpose of offering a framework which provides reconfiguration capabilities for standard video coding technology. The essential idea of RVC framework is a dynamic dataflow mechanism of constructing new video codecs by a collection of video coding tools from video tool libraries. With this objective, RVC framework is not restricted to specific coding standard, but defined at coding tools level with interoperability to achieve high flexibility and reusability. Three elements are normative in RVC framework: decoder description (DD), video tool library (VTL) and abstract decoder model (ADM). With these elements, a standard or new decoder is able to be reconfigured in RVC framework. This paper presents the procedure of describing a reconfigured decoder in DD, reusing and exchanging tools from VTLs and initializing ADM in the dataflow formalism of RVC framework. A decoder configuration which can be instantiated as AVS intra decoder configuration or other new decoder configurations in RVC framework is described as an example by using coding tools from China audio video coding standard (AVS) and MPEG series. It is shown that the process mechanism offered by RVC framework is versatile and flexible to achieve high reusability and exchangeability in decoder configurations. DEWEY : 361.382 ISSN : 0923-5965 En ligne : http://www.sciencedirect.com/science?_ob=PublicationURL&_tockey=%23TOC%235640%23 [...] [article] Reconfigurable video coding framework and decoder reconfiguration instantiation of AVS [texte imprimé] / Dandan Ding, Auteur ; Honggang Qi, Auteur ; Lu Yu, Auteur . - pp. 287-299. Electronique Langues : Anglais (eng) in Signal processing. Image communication > Vol. 24 N° 4 (Avril 2009) . - pp. 287-299 Mots-clés : RVC  Decoder  configuration  AVS  VTL  BSDL Index. décimale : 621.382 Dispositifs électroniques utilisant les effets des corps solides. Dispositifs semi-conducteurs Résumé : In 2004, a new standardization activity called reconfigurable video coding (RVC) was started by MPEG with the purpose of offering a framework which provides reconfiguration capabilities for standard video coding technology. The essential idea of RVC framework is a dynamic dataflow mechanism of constructing new video codecs by a collection of video coding tools from video tool libraries. With this objective, RVC framework is not restricted to specific coding standard, but defined at coding tools level with interoperability to achieve high flexibility and reusability. Three elements are normative in RVC framework: decoder description (DD), video tool library (VTL) and abstract decoder model (ADM). With these elements, a standard or new decoder is able to be reconfigured in RVC framework. This paper presents the procedure of describing a reconfigured decoder in DD, reusing and exchanging tools from VTLs and initializing ADM in the dataflow formalism of RVC framework. A decoder configuration which can be instantiated as AVS intra decoder configuration or other new decoder configurations in RVC framework is described as an example by using coding tools from China audio video coding standard (AVS) and MPEG series. It is shown that the process mechanism offered by RVC framework is versatile and flexible to achieve high reusability and exchangeability in decoder configurations. DEWEY : 361.382 ISSN : 0923-5965 En ligne : http://www.sciencedirect.com/science?_ob=PublicationURL&_tockey=%23TOC%235640%23 [...]