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Auteur Idkhajine, Lahoucine
Documents disponibles écrits par cet auteur
Affiner la rechercheFully integrated FPGA-based controller for synchronous motor drive / Idkhajine, Lahoucine in IEEE transactions on industrial electronics, Vol. 56 N° 10 (Octobre 2009)
[article]
in IEEE transactions on industrial electronics > Vol. 56 N° 10 (Octobre 2009) . - pp. 4006 - 4017
Titre : Fully integrated FPGA-based controller for synchronous motor drive Type de document : texte imprimé Auteurs : Idkhajine, Lahoucine, Auteur ; Monmasson, Eric, Auteur ; Naouar, Mohamed-Wissem, Auteur Article en page(s) : pp. 4006 - 4017 Note générale : Génie électrique Langues : Anglais (eng) Mots-clés : Angle tracking observer (ATO) Field-programmable gate arrays (FPGAs) system on chip (SoC) Fully integrated controller Permanent-magnet synchronous machine (PMSM) Resolver Resolver processing unit (RPU) Index. décimale : 621.38 Dispositifs électroniques. Tubes à électrons. Photocellules. Accélérateurs de particules. Tubes à rayons X Résumé : The aim of this paper is to present a fully integrated solution for synchronous motor control. The implemented controller is based on Actel Fusion field-programmable gate array (FPGA). The objective of this paper is to evaluate the ability of the proposed fully integrated solution to ensure all the required performances in such applications, particularly in terms of control quality and time/area performances. To this purpose, a current control algorithm of a permanent-magnet synchronous machine has been implemented. This machine is associated with a resolver position sensor. In addition to the current control closed loop, all the necessary motor control tasks are implemented in the same device. The analog-to-digital conversion is ensured by the integrated analog-to-digital converter (ADC), avoiding the use of external converters. The resolver processing unit, which computes the rotor position and speed from the resolver signals, is implemented in the FPGA matrix, avoiding the use of external resolver-to-digital converter (RDC). The sine patterns used for the Park transformation are stored in the integrated flash memory blocks. DEWEY : 621.38 ISSN : 0278-0046 En ligne : http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=4895244 [article] Fully integrated FPGA-based controller for synchronous motor drive [texte imprimé] / Idkhajine, Lahoucine, Auteur ; Monmasson, Eric, Auteur ; Naouar, Mohamed-Wissem, Auteur . - pp. 4006 - 4017.
Génie électrique
Langues : Anglais (eng)
in IEEE transactions on industrial electronics > Vol. 56 N° 10 (Octobre 2009) . - pp. 4006 - 4017
Mots-clés : Angle tracking observer (ATO) Field-programmable gate arrays (FPGAs) system on chip (SoC) Fully integrated controller Permanent-magnet synchronous machine (PMSM) Resolver Resolver processing unit (RPU) Index. décimale : 621.38 Dispositifs électroniques. Tubes à électrons. Photocellules. Accélérateurs de particules. Tubes à rayons X Résumé : The aim of this paper is to present a fully integrated solution for synchronous motor control. The implemented controller is based on Actel Fusion field-programmable gate array (FPGA). The objective of this paper is to evaluate the ability of the proposed fully integrated solution to ensure all the required performances in such applications, particularly in terms of control quality and time/area performances. To this purpose, a current control algorithm of a permanent-magnet synchronous machine has been implemented. This machine is associated with a resolver position sensor. In addition to the current control closed loop, all the necessary motor control tasks are implemented in the same device. The analog-to-digital conversion is ensured by the integrated analog-to-digital converter (ADC), avoiding the use of external converters. The resolver processing unit, which computes the rotor position and speed from the resolver signals, is implemented in the FPGA matrix, avoiding the use of external resolver-to-digital converter (RDC). The sine patterns used for the Park transformation are stored in the integrated flash memory blocks. DEWEY : 621.38 ISSN : 0278-0046 En ligne : http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=4895244