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Détail de l'auteur
Auteur Jayawickrama, Laksumana
Documents disponibles écrits par cet auteur
Affiner la rechercheSteady-state analysis and designing impedance network of Z-source inverters / Rajakaruna, Sumedha in IEEE transactions on industrial electronics, Vol. 57 N° 7 (Juillet 2010)
[article]
in IEEE transactions on industrial electronics > Vol. 57 N° 7 (Juillet 2010) . - pp. 2483 - 2491
Titre : Steady-state analysis and designing impedance network of Z-source inverters Type de document : texte imprimé Auteurs : Rajakaruna, Sumedha, Auteur ; Jayawickrama, Laksumana, Auteur Article en page(s) : pp. 2483 - 2491 Note générale : Génie électrique Langues : Anglais (eng) Mots-clés : Impedance network Operating states Ripple factor Z-source Index. décimale : 621.38 Dispositifs électroniques. Tubes à électrons. Photocellules. Accélérateurs de particules. Tubes à rayons X Résumé : All possible steady states of a Z-source inverter are identified and analyzed with the objective of deriving design guidelines for the symmetrical impedance network. This paper shows that, in addition to the desired three dynamic states, an operating cycle can contain another three static states that do not contribute to the power conversion process. These three static states can be avoided by selecting suitably large capacitors and inductors. By using the equations derived in the steady-state analysis, this paper presents guidelines to design the impedance network accurately for the case where the inverter is operated only in active and shoot-through states. The proposed design method can also be used to predict the critical values of capacitance and inductance below which static states appear during the operating cycle. Computer simulations and laboratory experiments are used to verify the design method and to demonstrate the appearance of static states when the capacitors and inductors are sized lower than their critical values. DEWEY : 621.38 ISSN : 0278-0046 En ligne : http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=5447792 [article] Steady-state analysis and designing impedance network of Z-source inverters [texte imprimé] / Rajakaruna, Sumedha, Auteur ; Jayawickrama, Laksumana, Auteur . - pp. 2483 - 2491.
Génie électrique
Langues : Anglais (eng)
in IEEE transactions on industrial electronics > Vol. 57 N° 7 (Juillet 2010) . - pp. 2483 - 2491
Mots-clés : Impedance network Operating states Ripple factor Z-source Index. décimale : 621.38 Dispositifs électroniques. Tubes à électrons. Photocellules. Accélérateurs de particules. Tubes à rayons X Résumé : All possible steady states of a Z-source inverter are identified and analyzed with the objective of deriving design guidelines for the symmetrical impedance network. This paper shows that, in addition to the desired three dynamic states, an operating cycle can contain another three static states that do not contribute to the power conversion process. These three static states can be avoided by selecting suitably large capacitors and inductors. By using the equations derived in the steady-state analysis, this paper presents guidelines to design the impedance network accurately for the case where the inverter is operated only in active and shoot-through states. The proposed design method can also be used to predict the critical values of capacitance and inductance below which static states appear during the operating cycle. Computer simulations and laboratory experiments are used to verify the design method and to demonstrate the appearance of static states when the capacitors and inductors are sized lower than their critical values. DEWEY : 621.38 ISSN : 0278-0046 En ligne : http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=5447792