[article]
Titre : |
An attention controlled multi-core architecture for energy efficient object recognition |
Type de document : |
texte imprimé |
Auteurs : |
Joo-Young Kim, Auteur ; Sejong Oh, Auteur ; Seungjin Lee, Auteur |
Année de publication : |
2012 |
Article en page(s) : |
pp. 363–376 |
Note générale : |
Electronique |
Langues : |
Anglais (eng) |
Mots-clés : |
Attention controlled Multi-core architecture Object recognition Visual attention Energy efficient |
Résumé : |
In this paper, an attention controlled multi-core architecture is proposed for energy efficient object recognition. The proposed architecture employs two IP layers having different roles for energy efficient recognition processing: the attention/control IPs compute regions-of-interest (ROIs) of the entire image and control the multiple processing cores to perform local object recognition processing on selected area. To this end, a task manager is proposed to perform dynamic scheduling of various ROI tasks from the attention IP to multiple cores in a unit of small-sized grid-tile. Thanks to a number of grid-tile threads generated by the task manager, the utilization of the multiple cores amounts to 92% on average. As a result, the proposed architecture achieves 2.1× energy reduction in multi-core recognition system by indicating processing cores to focus on critical area of the image with a 0.87 mJ attention processing. Finally, the proposed architecture is implemented in 0.13 μm CMOS technology and the fabricated chip verifies 3.2× lower energy dissipation per frame than the state-of-the-art object recognition processor. |
ISSN : |
0923-5965 |
En ligne : |
http://www.sciencedirect.com/science/article/pii/S0923596510000342 |
in Signal processing. Image communication > Vol. 25 N° 5 (Juin 2010) . - pp. 363–376
[article] An attention controlled multi-core architecture for energy efficient object recognition [texte imprimé] / Joo-Young Kim, Auteur ; Sejong Oh, Auteur ; Seungjin Lee, Auteur . - 2012 . - pp. 363–376. Electronique Langues : Anglais ( eng) in Signal processing. Image communication > Vol. 25 N° 5 (Juin 2010) . - pp. 363–376
Mots-clés : |
Attention controlled Multi-core architecture Object recognition Visual attention Energy efficient |
Résumé : |
In this paper, an attention controlled multi-core architecture is proposed for energy efficient object recognition. The proposed architecture employs two IP layers having different roles for energy efficient recognition processing: the attention/control IPs compute regions-of-interest (ROIs) of the entire image and control the multiple processing cores to perform local object recognition processing on selected area. To this end, a task manager is proposed to perform dynamic scheduling of various ROI tasks from the attention IP to multiple cores in a unit of small-sized grid-tile. Thanks to a number of grid-tile threads generated by the task manager, the utilization of the multiple cores amounts to 92% on average. As a result, the proposed architecture achieves 2.1× energy reduction in multi-core recognition system by indicating processing cores to focus on critical area of the image with a 0.87 mJ attention processing. Finally, the proposed architecture is implemented in 0.13 μm CMOS technology and the fabricated chip verifies 3.2× lower energy dissipation per frame than the state-of-the-art object recognition processor. |
ISSN : |
0923-5965 |
En ligne : |
http://www.sciencedirect.com/science/article/pii/S0923596510000342 |
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