[article] inSignal processing. Image communication > Vol. 25 N° 9 (Octobre 2010) . - pp. 633–647
Titre : |
Algorithm analysis and architecture design for rate distortion optimized mode decision in high definition AVS video encoder |
Type de document : |
texte imprimé |
Auteurs : |
Hai bing Yin, Auteur ; Honggang Qi, Auteur ; Hui Zhu Jia, Auteur |
Année de publication : |
2012 |
Article en page(s) : |
pp. 633–647 |
Note générale : |
Electronique |
Langues : |
Anglais (eng) |
Mots-clés : |
AVS Mode decision Rate distortion optimization VLSI architecture |
Résumé : |
There are abundant intra and inter prediction modes in the AVS video coding standard. Rate distortion optimized mode decision can fully utilize this flexibility to improve the spatio-temporal prediction efficiency and maximize the coding efficiency. However, the implementation complexity is dramatically high due to huge throughput burden. Hardware oriented mode decision algorithm is tailored for VLSI implementation in this work for high definition video coding. Mode preselection is employed to alleviate the dramatic throughout burden. Also, intelligent pipeline scheduling mechanism is proposed to break the intrinsic data dependency in intra prediction, which is directly related with mode decision. The proposed simplified algorithm is well-suited for hardware implementation with small performance penalty. Finally, the VLSI architecture is proposed with good trade off between circuit consumption and rate distortion performance. |
ISSN : |
0923-5965 |
En ligne : |
http://www.sciencedirect.com/science/article/pii/S0923596510000986 |
[article] Algorithm analysis and architecture design for rate distortion optimized mode decision in high definition AVS video encoder [texte imprimé] / Hai bing Yin, Auteur ; Honggang Qi, Auteur ; Hui Zhu Jia, Auteur . - 2012 . - pp. 633–647. Electronique Langues : Anglais ( eng) in Signal processing. Image communication > Vol. 25 N° 9 (Octobre 2010) . - pp. 633–647
Mots-clés : |
AVS Mode decision Rate distortion optimization VLSI architecture |
Résumé : |
There are abundant intra and inter prediction modes in the AVS video coding standard. Rate distortion optimized mode decision can fully utilize this flexibility to improve the spatio-temporal prediction efficiency and maximize the coding efficiency. However, the implementation complexity is dramatically high due to huge throughput burden. Hardware oriented mode decision algorithm is tailored for VLSI implementation in this work for high definition video coding. Mode preselection is employed to alleviate the dramatic throughout burden. Also, intelligent pipeline scheduling mechanism is proposed to break the intrinsic data dependency in intra prediction, which is directly related with mode decision. The proposed simplified algorithm is well-suited for hardware implementation with small performance penalty. Finally, the VLSI architecture is proposed with good trade off between circuit consumption and rate distortion performance. |
ISSN : |
0923-5965 |
En ligne : |
http://www.sciencedirect.com/science/article/pii/S0923596510000986 |
|