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Properties of silicon-on-insulator for bipolar integrated circuits / Azzedine Bellel 

Public ISBD Titre : Properties of silicon-on-insulator for bipolar integrated circuits Type de document : texte imprimé Auteurs : Azzedine Bellel, Auteur ; N. G. Emerson, Directeur de thèse Editeur : University of Surrey Année de publication : 1986 Importance : 93 f. Présentation : ill. Format : 30 cm. Note générale : Mémoire de Master : Electronique : Angleterre, University of Surrey : 1986 Bibliogr. f. 94 - 97 Langues : Anglais (eng) Mots-clés : Integrated  circuits Silicon  wafers Rutherford  backscattering Dielectric  isolation SOI  layers Index. décimale : Ms01286 Résumé : Silicon wafers have been implanted with 400 keV molecular oxygen, with a dose of 1.8 x 10¹⁸ O⁺/cm² at an implantation temperature of about 500°C. The wafers were annealed at 1200°C for 2 hours with SiO₂ cap. Rutherford backscattering has been used in the random mode to determine the thickness of the buried oxide. Leakage current through the oxide to the substrate or adjacent islands was measured. Dielectric isolation with leakage current of about 5 pA/mm² measured at 5V and breakdown field in excess of 7 MV/cm has been obtained, indicating that good island-to-substrate and island-to-island electrical isolation was achieved. Four point probe, Shockley-Haynes, and differential Hall techniques have been used to measure the electrical properties of the uppermost part of the SOI layers. For SOI substrates, the measured lifetimes are in the range 0.2 - 0.3 us, while for bulk silicon, the measured lifetimes are in the range 3 - 4 us. The relatively high lifetimes compared with SOS technology suggest the possibility of fabricating bipolar devices utilizing SOI structures. Minority as well as majority carrier mobilities obtained on SOI films are comparable with those of bulk silicon within the experimental uncertainty. The variation of the electrical resistivity for the SOI films with arsenic implant doses in the range 10¹² - 10¹⁵ As⁺/cm² has been shown to be similar to that in bulk silicon. The electrical profiles of the shallow electron distribution in the SOI substrates are comparable with that in the bulk silicon. All these results indicate that the uppermost part of the SOI layers are of comparable quality to bulk silicon. In this report, a comparative study of these electrical characteristics in SOI and bulk silicon is presented. Properties of silicon-on-insulator for bipolar integrated circuits [texte imprimé] / Azzedine Bellel, Auteur ; N. G. Emerson, Directeur de thèse . - [S.l.] : University of Surrey, 1986 . - 93 f. : ill. ; 30 cm. Mémoire de Master : Electronique : Angleterre, University of Surrey : 1986 Bibliogr. f. 94 - 97 Langues : Anglais (eng) Mots-clés : Integrated  circuits Silicon  wafers Rutherford  backscattering Dielectric  isolation SOI  layers Index. décimale : Ms01286 Résumé : Silicon wafers have been implanted with 400 keV molecular oxygen, with a dose of 1.8 x 10¹⁸ O⁺/cm² at an implantation temperature of about 500°C. The wafers were annealed at 1200°C for 2 hours with SiO₂ cap. Rutherford backscattering has been used in the random mode to determine the thickness of the buried oxide. Leakage current through the oxide to the substrate or adjacent islands was measured. Dielectric isolation with leakage current of about 5 pA/mm² measured at 5V and breakdown field in excess of 7 MV/cm has been obtained, indicating that good island-to-substrate and island-to-island electrical isolation was achieved. Four point probe, Shockley-Haynes, and differential Hall techniques have been used to measure the electrical properties of the uppermost part of the SOI layers. For SOI substrates, the measured lifetimes are in the range 0.2 - 0.3 us, while for bulk silicon, the measured lifetimes are in the range 3 - 4 us. The relatively high lifetimes compared with SOS technology suggest the possibility of fabricating bipolar devices utilizing SOI structures. Minority as well as majority carrier mobilities obtained on SOI films are comparable with those of bulk silicon within the experimental uncertainty. The variation of the electrical resistivity for the SOI films with arsenic implant doses in the range 10¹² - 10¹⁵ As⁺/cm² has been shown to be similar to that in bulk silicon. The electrical profiles of the shallow electron distribution in the SOI substrates are comparable with that in the bulk silicon. All these results indicate that the uppermost part of the SOI layers are of comparable quality to bulk silicon. In this report, a comparative study of these electrical characteristics in SOI and bulk silicon is presented.

Exemplaires

Code-barres	Cote	Support	Localisation	Section	Disponibilité	Spécialité	Etat_Exemplaire
Ms01286	Ms01286	Papier	Bibliothèque centrale	Mémoire de Master	Disponible

Documents numériques

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