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Artificial Neural Networks Hardware Implementation / Khalid Saadi 

Public ISBD Titre : Artificial Neural Networks Hardware Implementation Type de document : texte imprimé Auteurs : Khalid Saadi, Auteur ; Larbes, Chérif, Directeur de thèse Editeur : [S.l.] : [s.n.] Année de publication : 2017 Importance : 33 f. Présentation : ill. Format : 30 cm. Accompagnement : 1 CD-ROM. Note générale : Mémoire de Master : Electronique : Alger, Ecole Nationale Polytechnique : 2017 Bibliogr. f. 33 Langues : Français (fre) Mots-clés : Artificial  Neural  Network  (ANN)  Hardware  implementation Classification Index. décimale : Ms14717 Résumé : In the last decade the ANNs have shown massive computing capabilities. They are being used more and more in many fields because of their robustness and plasticity of architecture. To take full advantage of the ANNs, researchers have been working hard to find a better way to implement these networks in software or hardware. The ANN implementation has shown some difficulties. Thus a study to select the best implementation has been introduced. Each available hardware technology has its own advantages, and drawbacks. There have been many approaches to classify the neural hardware. In this thesis, it is listed some of the classification approaches used, and then the types of neural hardware used according to HEEMSKERK classification approach. To conclude some examples on neural hardware was given. Artificial Neural Networks Hardware Implementation [texte imprimé] / Khalid Saadi, Auteur ; Larbes, Chérif, Directeur de thèse . - [S.l.] : [s.n.], 2017 . - 33 f. : ill. ; 30 cm. + 1 CD-ROM. Mémoire de Master : Electronique : Alger, Ecole Nationale Polytechnique : 2017 Bibliogr. f. 33 Langues : Français (fre) Mots-clés : Artificial  Neural  Network  (ANN)  Hardware  implementation Classification Index. décimale : Ms14717 Résumé : In the last decade the ANNs have shown massive computing capabilities. They are being used more and more in many fields because of their robustness and plasticity of architecture. To take full advantage of the ANNs, researchers have been working hard to find a better way to implement these networks in software or hardware. The ANN implementation has shown some difficulties. Thus a study to select the best implementation has been introduced. Each available hardware technology has its own advantages, and drawbacks. There have been many approaches to classify the neural hardware. In this thesis, it is listed some of the classification approaches used, and then the types of neural hardware used according to HEEMSKERK classification approach. To conclude some examples on neural hardware was given.

Exemplaires

Code-barres	Cote	Support	Localisation	Section	Disponibilité	Spécialité	Etat_Exemplaire
S000041	Ms14717	Papier	Bibliothèque centrale	Mémoire de Master	Disponible	Electronique	En bon état

Documents numériques

SAADI.Khalid.pdf URL

Implementation of artificial neural on an FPGA board application on induction motor speed control / Khalid Saadi 

Public ISBD Titre : Implementation of artificial neural on an FPGA board application on induction motor speed control Type de document : texte imprimé Auteurs : Khalid Saadi, Auteur ; Anes Abderrahim Ouadria, Auteur ; Ammar Guellal, Directeur de thèse ; Larbes, Chérif, Directeur de thèse Editeur : [S.l.] : [s.n.] Année de publication : 2017 Importance : 80 f. Présentation : ill. Format : 30 cm. Accompagnement : 1 CD-ROM Note générale : Mémoire de Projet de Fin d'Etudes : Electronique : Alger, Ecole Nationale Polytechnique : 2017 Bibliogr. f. 79 - 80 Langues : Anglais (eng) Mots-clés : Artificial  neural  network  (ANN) FPGA C++  based  application Induction  motor Index. décimale : PN01217 Résumé : In many engineering applications, parallel distributed systems that satisfy the real-time constraint are strongly needed. Artificial neural networks (ANNs) represent highly parallel distributed systems that were directly inspired from the human brain. Thus they are appropriate for such applications. However the implementation of these networks proved to be quite challenging. It requires parallelism and flexibility. Among all types of circuits, FPGAs have proved to be the most convenient for that. But designing ANNs architectures to be implemented on FPGAs have some issues to be dealt with, like how to balance between numeric precision (required for accuracy), parallelism, and resources limitations. In this work we have proposed a C++ based application that generates optimized ANNs descriptions. We started first by introducing generalities on ANNs in chapter one. We devoted the second chapter to present an overview on the FPGA’s architecture. In chapter three we briefly presented the arithmetic issues in ANNs implementations. After that, we presented both architectures of a single neuron, and the whole ANN. we ended this chapter by presenting the way we coded our application and the principle of its functioning. ModelSim simulations where performed and they showed the good functioning of neural networks generated by the application. In the last chapter we have used our application to generate 6 ANNs that were used in a new induction motor control technique called ANN SHE. Simulations were performed as well and results were good and as expected. Implementation of artificial neural on an FPGA board application on induction motor speed control [texte imprimé] / Khalid Saadi, Auteur ; Anes Abderrahim Ouadria, Auteur ; Ammar Guellal, Directeur de thèse ; Larbes, Chérif, Directeur de thèse . - [S.l.] : [s.n.], 2017 . - 80 f. : ill. ; 30 cm. + 1 CD-ROM. Mémoire de Projet de Fin d'Etudes : Electronique : Alger, Ecole Nationale Polytechnique : 2017 Bibliogr. f. 79 - 80 Langues : Anglais (eng) Mots-clés : Artificial  neural  network  (ANN) FPGA C++  based  application Induction  motor Index. décimale : PN01217 Résumé : In many engineering applications, parallel distributed systems that satisfy the real-time constraint are strongly needed. Artificial neural networks (ANNs) represent highly parallel distributed systems that were directly inspired from the human brain. Thus they are appropriate for such applications. However the implementation of these networks proved to be quite challenging. It requires parallelism and flexibility. Among all types of circuits, FPGAs have proved to be the most convenient for that. But designing ANNs architectures to be implemented on FPGAs have some issues to be dealt with, like how to balance between numeric precision (required for accuracy), parallelism, and resources limitations. In this work we have proposed a C++ based application that generates optimized ANNs descriptions. We started first by introducing generalities on ANNs in chapter one. We devoted the second chapter to present an overview on the FPGA’s architecture. In chapter three we briefly presented the arithmetic issues in ANNs implementations. After that, we presented both architectures of a single neuron, and the whole ANN. we ended this chapter by presenting the way we coded our application and the principle of its functioning. ModelSim simulations where performed and they showed the good functioning of neural networks generated by the application. In the last chapter we have used our application to generate 6 ANNs that were used in a new induction motor control technique called ANN SHE. Simulations were performed as well and results were good and as expected.

Exemplaires

Code-barres	Cote	Support	Localisation	Section	Disponibilité	Spécialité	Etat_Exemplaire
P000031	PN01217	Papier + ressource électronique	Bibliothèque centrale	Projet Fin d'Etudes	Disponible	Electronique	Consultation sur place/Téléchargeable

Documents numériques

OUADRIA.Anes_SAADI.Khalid.pdf URL